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5253B P125H MNR4G HI1106 X1226S8Z 314030 SAA71 BZX84B12
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  . p ate n ted tec h nolo g y . f o ur hs tl di ff e r e n tial output s . t w o s ingle l v ttl/l v c mos in pu t s (s electable l v c mos / l v ttl cl o c k or c rys tal in pu t ) . op e r atin g fr eq u e n cy up t o 3 00 mh z w it h 1 5 pf l o a d . v e ry lo w outp u t pi n t o p in s ke w < 50 p s . 3.4 - n s p ro pagation delay ( max ) . 2.4 v t o 3.6 v p ow e r su ppl y . i n d u s t r ial tempe r atu r e r an g e: ? 4 0 c to 8 5 c . 2 0- pin t ssop package the PO74HSTL85353A is a low-skew, 1-to-4 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. the device is implemented on cmos technology and has a fully differential internal architecture that is optimized to achieve low signal skews at operating frequencies of up to 300mhz . the device features two inputs, one is lvttl / lvcmo signal and the other is c r y s tal i np u t . this mux is controlled by the clk_sel pin. the PO74HSTL85353A functions as a signal-level translator and fanout on lvcmos / lvttl single-ended signal to four hstl differential loads. since the PO74HSTL85353A introduces negligible jitter to the timing budget, it is the ideal choice for distributing high frequency, high precision clocks across back-planes and boards in communication systems. features: p i n co n f i gu r at i on l o gi c bloc k d ia g r a m description: 1 2 3 4 5 6 7 8 9 1 0 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 c l k q 0 n q 0 q 1 n q 1 q 2 n q 2 q 3 n q 3 cl k _ e n cl k _ s e l d le q 0 1 osc x t a l_ i n x t a l _ o u t p ull u p p ulldo w n p ulldo w n v e e cl k _ e n cl k _ s e l c l k n c x t a l_ i n x t a l_ o u t n c n c v c c q 0 n q 0 v c c q 1 n q 1 q 2 n q 2 v c c q 3 n q 3 l vcmos and x t a l input to hstl output 1:4 fanout bu f fer 1 01 / 01 / 10 potato semiconductor corporation PO74HSTL85353A www.potatosemi.com 300mhz hstl potato chip
c o nt rol input f un c t i on ta b l e input / o utput f un c t i on t ab l e pi n cha rac t eri st ic s pi n d e f i n i t io n s l o b m y s r e t e m a r a s p n o i t i d n o c t s e m t u m i n i m l a c i p y t m u m i x a m s t i n u c n i e c n a t i c a p a c t u p n i f 4 p r p u l l u p r o t s i s e r p u l l u p t u p n i 88 88 k k r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i s t u p n s i t u p t u o n e _ k l l c e s _ k l e c c r u o s d e t c e l e 3 s q : 0 3 q q n : 0 q n k 0 0 l w c o l ; d e l b a s i h d g i h ; d e l b a s i d t 1 0 u o _ l a t x , n i _ l a t w x o l ; d e l b a s i h d g i h ; d e l b a s i d k 0 1 l d c e l b a n d e e l b a n e t 1 1 u o _ l a t x , n i _ l a t d x e l b a n d e e l b a n e s t u p n s i t u p t u o k l c 3 q : 0 3 q q n : 0 q n 0 w o l h g i h 1 h g i h w o l input clock select with pull down resistor c l o ck enabled i gnd p o w er g r ound hstl hstl c ompleme n t output l v c oms / l v t tl clock input c r y stal oscill a t or i n t e r fa c e no c onne c t p o w er suppl y , p ositi v e c onne c tion p o w er l v cmos l v cmos/ l v t tl l v cmos/ l v t tl l v cmos/ l v t tl t u r e output vcc vcc name i/o t ype description pin q[0:3]# q[0:3] nc clk_sel clk0 x t al_in x t al_out clk_en vee i,pd i,pd i,pu o o p o w er 10,13,18 19 , 16,14,11 20 , 17,15,12 5 , 8 , 9 3 4 6 , 7 2 1 l vcmos and x t a l input to hstl output 1:4 fanout bu f fer 2 01 / 01 / 10 potato semiconductor corporation PO74HSTL85353A www.potatosemi.com 300mhz hstl potato chip
dc ele c t r ica l ch ara c t eri s t ic s s y m b o l descrip t i o n tes t c o ndi t i o n s m i n t y p m a x uni t v o h o u t p u t h i g h v o l t a g e v cc = 3 v v i n = v i h o r v i l , i o h = - 1 2 m a 2. 4 3 - v v o l o u t p u t l o w v o l t a g e v cc = 3 v v i n = v i h o r v i l , i o h = 1 2 m a - 0.3 0.5 v v i k c l a m p d i o d e v o l t a g e v c c = m i n . a n d i i n = - 1 8 m a - -0.7 -1.2 v n o t es : 1 . f o r c o n d i t i o n s s h o w n a s m a x . o r m i n . , u s e a p p r o p r i a t e v a l u e s p e c i f i e d u n d e r e l e c t r i c a l c h a r a c t e r i s t i c s fo r t h e a p p l i c a b l e d e v i c e t y p e . 2 . t y p i c a l v a l u e s a r e a t v c c = 3 . 3 v , 2 5 c a m b i e n t . 3 . t h i s p a r a m e t e r i s g u a r a n t e e d b u t n o t t e s t e d . 4 . n o t m o r e t h a n o n e o u t p u t s h o u l d b e s h o r t e d a t o n e t i m e . d u r a t i o n o f t h e t e s t s h o u l d n o t e x ce e d o n e s e c o n d . 5 . v o h = v c c ? 0 . 6 v a t r a t e d c u rr e n t m ax i m u m ra t i n g s d e s c r i p t i on m a x u n i t s t or a g e tem p e r at ur e -65 t o 150 c operation tem p eratu r e -40 to 85 c operation volt a g e -0.5 to +4.6 v i nput volt a ge -0.5 to +5.5 v output volta g e -0.5 to vc c + 0.5 v n o t e : s t re s s e s g r eate r t h a n l i s t e d u n d e r m a x i m u m r a t i n g s m a y c a u s e p e r m a n e n t d a m a g e t o t h e d e v i c e . t h i s is a stress rati n g o n l y a n d f u n c ti o n a l o pe r ati o n o f t h e d e v i c e a t t h e s e o r a n y o t h e r c o n d iti o n s a b o v e t h o s e i n d i c a t e d i n t h e o p e rati o n a l secti o n s o f t h i s s p eci f icati o n i s n o t i m p lie d . e x p o s u r e t o a b s o l u te m a x i m u m r a ti n g c o n d iti o n s f o r e x t e n d e d p e r i o d s m a y a f f e c t relia b ili t y s p ec i f icati o n is n o t i m p lie d . m ultiple supplies : t he v oltage on a n y input or i/o pin c annot e x c eed the p o w er pin du r ing p o w er-u p . p o w er supply sequencing is n o t r equi r e d . l vcmos and x t a l input to hstl output 1:4 fanout bu f fer 3 01 / 01 / 10 potato semiconductor corporation PO74HSTL85353A www.potatosemi.com 300mhz hstl potato chip
po w er supply c h aracteristics s y m b o l descrip t i o n tes t c o ndi t i o n s ( 1 ) m i n t y p m a x uni t ic c q qu i e s c e n t p o w e r s u p p l y c ur r e n t v cc = m a x , v i n = v c c o r g n d - 0.1 30 ua n o t es : 1 . f o r c o n d i t i o n s s h o w n a s m a x . o r m i n . , u s e a p p r o p r i a t e v a l u e s p e c i f i e d u n d e r e l e c t r i c a l c h a r a c t e r i s t i c s fo r t h e a p p l i c a b l e d e v i c e t y p e . 2 . t y pic a l v a l u e s a r e a t v c c = 3 . 3 v , 2 5 c a m b i e n t . 3 . t h i s p a r a m e t e r i s g u a r a n t e e d b u t n o t t e s t e d . 4 . n o t m o r e t h a n o n e o u t p u t s h o u l d b e s h o r t e d a t o n e t i m e . d u r a t i o n o f t h e t e s t s h o u l d n o t e x c e e d o n e s e c o n d . s w i t c h i ng ch ara c t eri s t ic s t i n u x a m ) 1 ( s n o i t i d n o c t s e t n o i t p i r c s e d l o b m y s t pd p r o p a g a t i o n d e l a y cl k a or cl k b to o ut p ut pai r c l = 1 5 p f 3.4 ns t r / t f r i s e / f a l l t i m e 0 . 8 v ? 2 . 0 v 0.8 ns tsk(o) o ut p u t p i n t o p i n s k e w ( s a m e p a c k a g e ) ps ps t s k ( p p ) o u t p u t s k e w ( d i ff e r e n t p a c k a g e ) f m ax f p 5 1 = l c y c n e u q e r f t u p n i 250 mhz n o t es : 1 . s e e t e s t c i r c u i t s a n d w a v e f o r ms . 2 . t p l h , t p h l , t s k ( p ) , a n d t s k ( o ) a r e p r o d u c t i o n t e s t e d . a l l o t h e r p a r a m e t e r s g u a r a n t e e d b u t n o t p r o d u c t i o n t e s t e d . 3 . a i r f l o w o f 1 m / s i s r e c o mm e n d e d f o r f r e q u e n c i e s a b o v e 1 3 3 m h z c l = 1 5 p f , 1 2 5 m h z c l = 1 5 p f , 1 2 5 m h z 50 350 300 n o t es : s e e s c h ematic e x ampl e . crystal oscillator test conditions s n o i t i d n o c t s output frequency 50 3.579 14.318 28 250 e t ts i n u mhz mhz mhz x1=50mhz, c4=50pf, c5=50pf, r1=3k x1=3.579mhz, c4=100pf, c5=100pf x1=14.318mhz, c4=50pf, c5=50pf x1=28mhz, c4=50pf, c5=50pf, r1=5.1k x1=250mhz, c4=0, c5=0, r1=1k mhz mhz l vcmos and x t a l input to hstl output 1:4 fanout bu f fer 4 01 / 01 / 10 potato semiconductor corporation PO74HSTL85353A www.potatosemi.com 300mhz hstl potato chip
test waveforms figure 2. hst l output figure 1. l vttl/ l vcmos input w a veform definition figure 3. propogation dela y , output pulse ske w , and output-to-output skew for d to output pair tphl tplh tpd input clock output clock another output clock vo tsk(o) vo t r ,tf, 20-80% input 3v 1.5v 0v figure 4. clk_en t iming diagram ena b led disa b led clk clk_en n q 0 : n q 3 q 0 : q 3 l vcmos and x t a l input to hstl output 1:4 fanout bu f fer 5 01 / 01 / 10 potato semiconductor corporation PO74HSTL85353A www.potatosemi.com 300mhz hstl potato chip
test cir c uit 50ohm 15pf to 2pf 15pf to 2pf vcc pulse generator d.u.t schematic example x 1 c 3 0 . 1 u u 1 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 2 0 1 9 1 8 1 7 v e e c l k _ e n c l k _ s e l c l k n c x t a l 1 x t a l 2 n c n c v c c n q 3 q 3 v c c n q 2 q 2 n q 1 q 0 n q 0 v c c q 1 3 . 3 v r 1 2 1 k 3 . 3 v 3 . 3 v c 2 0 . 1 u + - + - + - + - 3 . 3 v r 1 1 1 k r 1 c 4 4 0 p - 6 0 p f c 1 0 . 1 u c 5 s p a r e 3 . 3 v l vcmos and x t a l input to hstl output 1:4 fanout bu f fer 6 01 / 01 / 10 potato semiconductor corporation PO74HSTL85353A www.potatosemi.com 300mhz hstl potato chip
l vcmos and x t a l input to hstl output 1:4 fanout bu f fer x.xx x.xx denotes dimensions in millimeters seating plane packaging mechanical drawing: 20 pin tssop .252 .260 .047 1.20 .002 .006 .0256 bsc 1 20 .169 .177 0.05 0.15 4.3 4.5 6.4 6.6 0.65 0.19 0.30 .007 .012 max .018 .030 .004 .008 .238 .269 6.1 6.7 0.45 0.75 0.09 0.20 ic ordering information top-marking ordering code package pb-free & green PO74HSTL85353Asu for tube PO74HSTL85353Asr for tape & reel PO74HSTL85353As -40 c to 85 c -40 c to 85 c t a pb-free & green 20pin 173mil tssop ic package information package t 16 8 t op l eft corner 39 (12?) 3000 64 (20?) 74 20pin 173mil tssop code package type tape width tape trailer tube tape & reel length tape pitch qty length tape leader per tape qty per pin 1 location (mm) (mm) 7 01 / 01 / 10 potato semiconductor corporation PO74HSTL85353A www.potatosemi.com 300mhz hstl potato chip PO74HSTL85353As 20pin 173mil tssop


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